AMS Design Verification Layout Engineers

Location – Noida, Hyderabad:

• AMS Layout Engineers – 4 Positions

• AMS Design / Verification / Layout Engineers – 8 Positions

Experience: 4 to 10 Years
Job Type: Full-time (On-site)
Notice Period: Immediate to 30 Days preferred

• Experience in Analog and Mixed Signal circuit design

• Strong understanding of CMOS, PLLs, ADCs, DACs, LDOs, Oscillators, and Power Management blocks

• Hands-on experience in AMS simulation techniques using Verilog-AMS or SystemVerilog-AMS

• Good exposure to mixed-signal testbench development and verification methodology

• Deep knowledge of analog/mixed-signal layout including matching, shielding, floor planning, and DRC/LVS checks

• Experience with layout tools such as Virtuoso, Calibre, etc.

• Solid understanding of analog and mixed-signal concepts

• Proficiency with industry-standard EDA tools (Cadence Virtuoso, Spectre, Calibre, etc.)

• Prior experience in tape-outs at advanced technology nodes (28nm and below is a plus)

• Strong communication and collaboration skills