AMS Verification

Job Title:

Senior Engineer - AMS Verification

Locations:

Hyderabad, India

Skill Set:

SystemVerilog,AMS Verification,Communication,Scripting Languages,Documentations,Mixed Signal

Skill to Evaluate:

SystemVerilog,AMS Verification,Communication,Scripting Languages,Documentations,Mixed Signal

Location:

Hyderabad, India

Job Description:

·        BE/B.Tech in ECE /M.Tech in VLSI with 6 to 10 years experience in Analog Mixed Signal Verification

·        Very Good experience in Verilog AMS, Verilog-A, WREAL, modeling of Analog blocks

·        Very Good experience in Analog Mixed Signal verification simulation tools

·        Good experience in System Verilog, UVM methodologies

·        Able to train the team members and guide the team in resolving issues

·        Good experience in creating the AMS Verification environment and able to create AMS Verification environment from scratch.

·        Good experience in Gate level netlist simulation

·        Experience in Python, Perl, Shell scripting is added advantage.

·        Good communication and documentation skills