About the role
Requirements:
- At least 5-10 years of relevant experience in NAND, DDR and PCIe verification.
- Strong and relevant expertise with ASIC simulation tools and advanced verification methods.
- Expert level in verification languages such as UVM and System Verilog.
- Relevant experience with writing block-level and SoC test plans.
- Education: B. S. in electrical engineering and computer science with extensive industry experience.
- An expert-level experience with Nand, DDR and PCIe IP/sub-systems.
- Highly experienced with defining block, sub-system and SOC top-level test plans.
- An expert level in developing UVM-based SV test-benches.
- Deep understanding and knowledge of verification methodologies, flows and quality metrics.
- Great debugging and problem-solving skills.
- Team player with great interpersonal communication skills.
Must-Haves:
- Minimum 5 years of experience in IP/Block/Subsystem Verification (RTL Front-end verification).
- Minimum 4 years of experience in SV, UVM Verification.
- Minimum 2 years of experience in Interfaces (AXI/AHB).
- Minimum 2 years of experience in Protocols (DDR/Onfi/PCIE/NVMe).
- Scripting (Perl/Python) - Optional.