About the role
• Custom layouts for High-Speed Custom Analog/Digital blocks, such as Ring Oscillators, Dividers, Bias Blocks (Voltage & Current references), pre-drivers etc. in TSMC 2nm & 3nm, • Independent in debugging and resolving the layout fixes in various verification flows • Flexible to take different tasks in project. • Execute tasks with minimum supervision/tracking, • Have accountability and ownership on blocks & tasks assigned. • Completed layout designs, with desired quality, with all specified verification flows clean • Create and check all relevant design views using sign-off tools. • Documentation as per requirement. Desired Qualification: • B.Tech/B.E./MS /M.E. /M tech in Electrical Engineering • hands-on experience in block/module layouts with Cadence Layout design tools, exp in TSMC 5nm or lower node is must • Well versed with layout design and verification tools - Cadence Virtuoso EXL/GXL, Calibre etc. • Knowledge of scripting (SHELL, PERL, SKILL), excel is good to have.