Head of Hardware Engineering

We are looking for a hands-on technical leader to own the entire hardware engineering function, from high-speed digital, analog/mixed-signal, FPGA, PCB, and full system integration through to ruggedized, manufacturable products. You will be the single point of accountability for the hardware roadmap across every ORG product line.

Responsibilities:

• Full hardware lifecycle requirements capture, architecture, schematic and PCB design, FPGA RTL and verification, bring-up, characterization, EVT/DVT/PVT, qualification, and volume manufacturing transfer.
• FPGA and digital subsystems partition and architect Zynq UltraScale+ MPSoC and Versal-class designs, lead high-speed SerDes (JESD204C), DSP pipelines (DSP48E2), and embedded Linux/PetaLinux integration for QKD and QRNG signal processing.
• Analog and mixed-signal frontends: low-noise amplifier design, high-speed Gsps-class ADC/DAC interfacing, precision clocking and timing distribution, low-jitter PLL architectures, high-resolution data acquisition, and the full sensor-to-digital signal chain.
• PCB and system integration: high-speed digital and mixed-signal stack-ups, signal/power integrity, EMI/EMC compliance, and ruggedized industrial and defense-grade enclosures.
• Team leadership: build, structure, and mentor a hardware engineering team of 15+ across digital, analog, FPGA, and layout disciplines. Set engineering standards, design reviews, and quality gates.
• Customer and partner engagement represents ORG hardware to the Indian Armed Forces and international partners; translate field requirements into product specifications.
• Manufacturing and supply chain own DFM/DFT/DFA, supplier qualification, component obsolescence strategy, and the path from prototype to volume.
• IP and standards drive patent generation, contribute to ETSI/ITU/IEEE DeepTech security standards, and ensure compliance with FIPS, Common Criteria, and applicable defense qualification standards.

Requirements:

• Experience: 15+ years in hardware engineering with at least 5 years leading multidisciplinary teams; demonstrated track record of taking complex hardware products from concept to volume production.
• Education: M. Tech, M. S., or PhD in Electronics, Electrical, or Computer Engineering from league A colleges or equivalent. Outstanding industry track record will be considered in lieu.
• Leadership traits: strong systems thinking, calm under technical pressure, decisive in architectural trade-offs, comfortable in the lab as well as the boardroom, and able to attract and grow talent.

Core technical depth across all three areas is non-negotiable:

• High-speed digital design: multi-Gbps interface design, DDR4/DDR5 PCIe Gen3/Gen4/Gen5 10/25/100G Ethernet, SerDes channel design and equalization, signal- and power-integrity simulation (HyperLynx, ADS, HFSS, Sigrity), SoC integration, embedded Linux/PetaLinux, secure boot, and root-of-trust architectures.
• FPGA: Xilinx/AMD Zynq UltraScale+ and Versal, Vivado, MPSoC architecture and partitioning, AXI interconnect, high-speed SerDes (GTH/GTY/GTM), JESD204B/C, DSP pipelines, RTL coding (SystemVerilog/VHDL), constrained-random verification (UVM), simulation, and timing closure on demanding designs.
• Analog / mixed-signal: low-noise amplifier design, high-speed ADC/DAC interfacing, precision timing and clock distribution, low-jitter PLLs, low-noise power-supply design for noise-sensitive instrumentation, and the analog-digital boundary on mixed-signal boards.

Strong preference for candidates with experience in one or more of:

• Telecom or networking hardware (line cards, optical transport, switching/routing platforms, NPUs).
• Test and measurement instrumentation, SDR platforms, or high-precision data acquisition systems.
• ASIC, SiP, or chiplet development.
• Defense, aerospace, or space-qualified hardware (MIL-STD, JSS, ECSS) and engagement with the Indian defense ecosystem.
• Cryptographic / security hardware (HSMs, FIPS 140-2/3 Common Criteria EAL4+).