Implementation

About the Unit

TCS IAE is redefining the future of industry by embedding intelligence across engineering, manufacturing, asset, and service value chains. Powered by AI, connected ecosystems, and autonomous operations, it transforms insights into action—creating self-optimizing, resilient, and intelligent enterprises at scale. By seamlessly converging the physical and digital worlds, TCS IAE is enabling a new era of AI-first enterprises where systems continuously learn, adapt, and evolve—driving measurable outcomes and shaping how industries operate for the future.

Role: Implementation (Physical Design) Engineer (RTL to GDSII)

Roles & Responsibilities

·Execute end-to-end RTL to GDSII physical design flow for block, subsystem, and full-chip designs

·Perform floorplanning, power planning, placement, CTS, and routing

·Drive multi-corner multi-mode (MCMM) static timing analysis and closure

·Ensure physical verification signoff (DRC, LVS, ERC)

·Analyze and close IR drop, EM, and signal integrity issues

·Optimize Power, Performance, Area, Thermal and Schedule (PPATS)

·Support low-power implementation using UPF/CPF methodologies

·Collaborate with RTL, DV, DFT, STA, and signoff teams

·Develop automation and improve RTL-to-GDSII methodologies

Tools & Skills

·Physical Design Tools: Synopsys Design Compiler, Fusion Compiler, ICC2

·Cadence Tools: Genus, Innovus, Tempus

·Timing Analysis: Synopsys PrimeTime

·Physical Verification: Siemens Calibre (DRC, LVS, ERC)

·Power & Reliability: IR drop, EM, noise analysis

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