Physical Design Engineer

Experience Level:

• 1 Engineer: 10+ Years

• 1 Engineer: 6–8 Years

• 1 Engineer: 3–5 Years

Location: Hyderabad / Bangalore (On-site)
Technology Node: 28nm – Global Foundries
Job Type: Full-time
Notice Period: Immediate to 30 Days preferred

• Strong hands-on experience in Analog and Mixed Signal SoC Implementation.

• Experience with Mixed Signal and Digital Hierarchical SoC Design.

• Solid understanding of Place & Route (PnR) and Signoff flows.

• Expertise in Cadence EDA Tools including:

  • Innovus

  • Tempus

  • Genus

• Working knowledge in 28nm technology node – preferably Global Foundries (GF-28nm).

• Proficient in Timing Closure, Physical Verification (PV), and Signoff Checks.

• Experience with low-power SoC implementation.

• Familiarity with hierarchical floor planning and design constraints.